1. Field of the Invention
This invention relates to an automatic grid array inspection system, and more particularly, to a automatic, non-contact inspection system for measuring the dimensional and geometric characteristics of semiconductor device packages.
2. Description of Related Art
The requirement for semiconductors to perform more functions at higher speeds while occupying less space on a printed circuit board has lead to the development and deployment of semiconductor packages that mount directly to the surface of the printed circuit board. Because these devices provide a high degree of functionality, they must provide for a large number of connections to provide input, output, power and ground. Grid array packages became necessary as the number of input/output connections for complex semiconductors became greater than could be accommodated in the limited area provided by only the sides of the semiconductor for interconnection, even in the finest pitch configurations. In addition, as complex semiconductors, such as processor chip packages, became physically larger, the length of the conductor path from the chip to the pad had to be minimized to provide high speed.
In order to reduce size and increase operating speed of the semiconductor those connections that contact the surface of the board must be very close to each other (fine pitch) and very close to the board thereby requiring very narrow and mechanically fragile leads. The length and geometry of the lead is critical as all connections must make contact with the wiring board pads without damage to the semiconductor, shorting or other connection defects. If one or more leads are too long then one or more other leads may not be able to provide a reliable contact to the board pad. If one or more leads are displaced or bent they may miss the pad or short circuit to an adjacent pad. It is critical therefore that the X and Y positions as well as the height and geometry of each connection is within the manufacturing tolerance of the semiconductor package design. Thus, rigorous manufacturing tolerances are required for the allowable X and Y position of an interconnect pin or ball as well as the heights of the pins or balls relative to the package body (coplanarity). In addition, pin grid arrays may exhibit defects not previously encountered in other package types (such as the compound bend of a pin).
Furthermore, the inspection method must be high speed in order to keep the cost of inspection to a minimum. Since the semiconductors have many interconnects (often above 200 and up to 400) and are physically large in area (up to 3.0 inches per side) the sensors, architecture and algorithms must support this requirement.
Previous systems provided measurement equipment for determining the dimensional lead integrity for semiconductor packages whose leads were on the outer periphery of the package, such as quad flat packs (QFP's) and single outline integrated circuit's. Visual imaging provided data used to identify broken leads, lack of leads, bent leads, and the angle of leads.
The methods and algorithms required for these measurements are well known but are not suitable to the construction and requirements of the pin and bump grid arrays whose interconnects are placed in multiple positions throughout the bottom area of the package.
Thus, the previous camera-based systems and techniques do not provide the three-dimensional data required for simultaneous position and height measurements. Side view images do not provide the mechanisms for inner lead measurements, bottom views do not provide height information.
Point laser triangulation systems provide adequate height information however, because of their limited measurement area and rates are much too slow for production volume testing.
Other techniques, such as structured light triangulation, typically does not provide the accuracy and flexibility required for the wide range of products that must be inspected.
The identification of compound bends in pin grid arrays by previous methods have proven unreliable and ineffective. A compound bend occurs when the intermediate portion of the pin is bent but the tip of the pin remains very close to the axis of projection from the device itself. This results in the tip of the pin being lower than if the pin was not bent, but the difference in height of the tip of the bent pin is not so great as to be greater than the overall deviation in all pin heights. Therefore, compound bends in pins can not be detected by height measurements at the pin tip alone.
In addition, previous art inspection systems are much larger in size. This increases the footprint of the system and makes utilization in the in-line manufacture and test of components difficult.
Finally, due to the physical characteristics of ball grids, accurate position data has been difficult to calculate. The surface of the solder balls is shiny and smooth, and gradually slopes to the surface of the package making ball position and height measurements difficult.
There is a need, therefore, for an automatic grid array inspection system for improving quality control of manufacturing of grid arrays. The system must be cost effective in determining the two-dimensional positioning of the balls and pins on the grid, in determining the height of each, in detecting bent pins, and in measuring coplanarity at rates for 100% inspection. Further, the system must perform the inspection with high speed and high accuracy.